1. Field of the Invention
The present invention relates to an extremal voltage detector, more specifically to a maximum voltage detector for detecting the highest of a plurality of input voltages and a minimum voltage detector for detecting the lowest of a plurality of input voltages.
2. Description of the Related Art
FIG. 1 is a schematic diagram of a conventional maximum value detector disclosed in Japanese Patent Application Publication No. 2005-5808.
This detector generates an output voltage z equal to the highest among three input voltages x1 to x3. The detector comprises npn transistors Q11 to Q13 receiving input voltages x1 to x3 at their bases, an npn transistor Q1r that generates the output voltage z by feedback at its base, a current source Jt for driving npn transistors Q11 to Q13 and Q1r, and pnp transistors Q21 to Q23 and Q2r for feeding identical currents to the turned-on transistors among npn transistors Q11 to Q13 and Q1r. Transistors Q11 to Q13 and Q1r are formed so as to have identical VBE-IE (base-emitter voltage vs. emitter current) characteristics.
The detector also has npn transistors Q31 to Q33 and pnp transistors Q41 to Q43 that control the base currents of pnp transistors Q21 to Q23, current sources J1 to J3 for driving respective npn transistors Q31 to Q33, and an output impedance converter F. The impedance converter F comprises an npn transistor Qa driven by a current source Ja and a pnp transistor Qb driven by another current source Jb.
The emitters of npn transistors Q11 to Q13 and Q1r are connected in common to current source Jt, and their collectors are connected through respective transistors Q21 to Q23 and Q2r to a terminal from which they receive a power supply potential VCC. The base of transistor Q1r is connected to the emitter of pnp transistor Qb in the impedance converter F.
Transistors Q31 to Q33 have their collectors all connected to the power supply potential (VCC), their bases connected to the collectors of respective transistors Q21 to Q23, and their emitters connected to respective current sources J1 to J3. Transistors Q41 to Q43 have their bases connected to the emitters of respective transistors Q31 to Q33, their emitters connected to the bases of respective transistors Q21 to Q23, and their collectors all connected to ground (GND).
The bases of transistors Q21 to Q23 are connected in common to the base of transistor Q2r, forming a current mirror in which transistors Q21 to Q23 constitute the input side and transistor Q2r constitutes the output side.
Transistors Q31 to Q33, Qa, and Qb operate as emitter followers.
The operation of this circuit will be described under the assumption that input voltage x1 is the highest of the three input voltages x1 to x3.
Under this assumption, transistor Q11 pulls the emitter voltages of transistors Q11, Q12, Q13, Q1r up to a value V01 equal to the difference (x1−VBE1) between input voltage x1 and the base-emitter voltage VBE1 at which transistor Q11 turns on. The base-emitter voltages of transistors Q12, Q13 are less than VBE1, so while transistor Q11 is turned on, transistors Q12 and Q13 are turned off. This forces up the base voltages of transistors Q32, Q33. Because transistors Q32, Q33 operate as emitter followers, the base voltages of transistors Q42, Q43 are likewise pulled up. As a result, transistors Q42, Q43 are turned off and do not draw base current from transistors Q21, Q22, Q23, Q2r. 
Conversely, the turned-on transistor Q11 pulls down the base voltage of emitter-follower transistor Q31, and accordingly lowers the base voltage of transistor Q41. Transistor Q41 is thereby turned on and draws base current from transistor Q21, enabling transistor Q21 to supply collector current I1 to transistor Q11. Transistor Q41 also draws base currents from transistors Q22, Q23, and Q2r, but the collector currents I2, I3 of transistors Q22, Q23 flow to the bases of transistors Q32, Q33, respectively, instead of to transistors Q12, Q13, which are turned off.
The voltage that appears at the base of transistor Q1r is obtained by adding the base-emitter voltage VBE2 of transistor Q1r to its emitter voltage V01. Accordingly, the output voltage z can be calculated as follows:z=V01+VBE2=x1−VBE1+VBE2
Since transistors Q21 to Q23 and Q2r constitute a current mirror, transistors Q11 and Q1r conduct identical currents. From the identical VBE-IE characteristics of transistors Q11 and Q1r, it follows that their base-emitter voltages are equal (VBE1=VBE2). The output voltage z is therefore equal to input voltage x1 (z=x1), so that the highest voltage x1 among the input voltages x1 to x3 is output as the output voltage z.
Since this maximum voltage detector is a bipolar transistor circuit, however, it draws input current. In the example above, input current is drawn into the base of transistor Q11. If the voltage source connected to the base of transistor Q11 has high output impedance, the flow of input current produces a significant drop in the input voltage, which has been problematic.
If, for example, the voltage source connected to the base of transistor Q11 has an output impedance of one hundred kilohms (100 kΩ) and the base current of transistor Q11 is one milliampere (1 μA), the resulting voltage drop ΔV is 100 mV (=100 kΩ×1 μA).
Accordingly, this maximum voltage detector is inapplicable to circuits such as liquid crystal driver circuits in which a current drain of several tens on nanoamperes is enough to lead to pixel on-off malfunctions.